Intel's Next Generation Chip Architecture

On 21 April 2009 Intel corporation held an “Intelligent Processors” event which highlighted Intel’s next generation chip architecture and the industry leading companies who are incorporating this technology into their products.   The event, pulled together by Nigel Ballard of Intel, included demos by companies like Endeca, Cisco, Cray, Dell, HP, Oracle, VMware, Microsoft and Sun.  Nineteen hardware partners showed off Xeon 5500-based server products at this event.  Clearly Nigel is a man with convening authority.  When he calls, the big guns of the IT community come.

There were two other big draws at this event.  One was the Intel CTO, Justin Rattner.  I’ll be running a separate article on my interview of Justin shortly.  For now I’ll just say it was great having the new Nehalem Microarchitecture placed in context by a CTO of his stature.  He provided a keynote that underscored not only the technology of this smart server processor, but hit on the importance of innovating in a downturn.  His message was very clear and it is one I believe.  Now is the time to transform computing.

Eric Doyle, Intel’s enterprise Marketing Manager, provided a deeper dive into the power of real offerings based on the new chip, especially the Intel Xeon 5500 (I meant to ask Eric if he can shed some light on why the codename for this project was called Nahelem, since he said he lives in Oregon I wonder if he named it?).

The following are a few notes that combine things Justin Rattner and Eric Doyle said:

The Xeon 5500 based on the Nehalem project is  really the next era for computer chips, providing the biggest jump in productivity and efficiency since the Pentium Pro.    The Nehalem is hitting the market right now (you can get one for your house if you buy a MacPro).  The server based on the Nehalem is Xeon 5500.

The design of Nahalem is based on quad core design with two executable threads per core.  The design also provides an added degree of intelligence to how things are done on the chip.  Little processors on the chip oversee and manage the big processors in the chip and that concept allows for some very significant improvements to computing.  For example, energy efficiency is far more adaptable/configurable.  When you don’t need full processing power, less power is drawn.  New virtualization capabilities are also enabled with this approach.

The result is that the Xeon 5500 provides the largest jump in computer performance in Intel’s history.  In fact, this jump is the greatest performance leap in computer history.  This jump is not just because of more transistors on the chip, it is because of a very smart design involving more cores.

This chip also provides features that will enhance trustworthy computing.  I found this especially interesting and the whole discussion left me feeling far more upbeat about the future of IT.   I have no doubt security will still be a constant battle well into the future, but with this new design the ability to run cryptographic algorithms is sped up significantly.  This design enables a 40% improvement in OpenSSL performance and a 50% improvement in RSA2048, for example.  New capabilities will soon be enabled that leverage the chip’s management capabilities to attest to true endpoint state.  This will enable enhanced defenses against rootkits.

A few other bullets on Nehalem, from the Intel website:
Intel® microarchitecture, codenamed Nehalem, offers the latest in processor innovation, including:

  • Dynamic scalability, managed cores, threads, cache, interfaces, and power for energy-efficient performance on-demand.
  • Design and performance scalability for servers, workstations, notebooks, and desktops with support for 2-8+ cores and up to 16+ threads with Intel® Hyper-Threading Technology (Intel® HT Technology), and scalable cache sizes, system interconnects, and integrated memory controllers.
  • Intelligent performance on-demand with Intel® Turbo Boost Technology taking advantage of the processor's power and thermal headroom. This enables increased performance of both multi-threaded and single-threaded workloads.
  • Increased performance on highly-threaded applications with Intel HT Technology, bringing high-performance applications into mainstream computing with 1-16+ threads optimized for new generation multi-core processor architecture.
  • Scalable shared memory features memory distributed to each processor with integrated memory controllers and Intel QuickPath Technology high-speed point-to-point interconnects to unleash the performance of future versions of next-generation Intel® multi-core processors.
  • Multi-level shared cache improves performance and efficiency by reducing latency to frequently used data.

What is the “so what” of all the above?  Upgrade your old servers now.  It will save energy, it will save space, it will reduce operating cost, it will increase security, and it will enable more advanced applications.

As for the many demos seen at this event, my favorite was the one presented by my friends at Endeca.  Endeca is one of the first companies fielding capabilities that can take maximum advantage of Nehalem.   The speed, scale and scope of the data they can parse and enable interaction with is incredible.  If you are considering an Endeca deployment, consider Xeon 5500.  Ask Endeca for the demo and you will see why.  It just makes total sense.

Soon I’ll post a few more thoughts based on my interview of Justin Rattner.  Say tuned and happy computing!

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Bob Gourley

Partner at Cognitio Corp
Bob Gourley is a Co-founder and Partner at Cognitio and the publisher of CTOvision.com andThreatBrief.com. Bob's background is as an all source intelligence analyst and an enterprise CTO. Find him on Twitter at @BobGourley
Connect Here
About Bob Gourley

Bob Gourley is a Co-founder and Partner at Cognitio and the publisher of CTOvision.com and ThreatBrief.com. Bob's background is as an all source intelligence analyst and an enterprise CTO. Find him on Twitter at @BobGourley

Comments

  1. dave fauth says:

    Bob, How much improvement was seen in the Endeca platform?

  2. Dave,

    It was amazing. Endeca is already impressive and fast but requires good design. Now what they demonstrated is even faster and more capable, operating in ways that just blew me away. I think I should ask them to give me a briefing on what they did with Xeon. If I get that I'll post it here.

  3. dave fauth says:

    Thanks. I couldn't make it due to work commits. I would like that same briefing as well (if you want to do it jointly).

  4. Mary Winters says:

    Bob,

    This was a great overview. How'd you hear about the event?

  5. dave fauth says:

    Mary,

    My Endeca contact sent me an invite which also got me an invite into the Intel Premier IT Professional Site.

    df

  6. Mary,

    I'm in the Intel Premier IT Professional Site as well. It is a great source of data. See: https://ipip.intel.com/kmembership_info/join/ for more info.

    Bob

  7. Thanks for the write up Bob

    We promoted the event though our IPIP member list, via WTOP radio commercials and in concert with our many hardware partners, 19 of which were demonstrating Xeon 5500-based hardware on the day.

    If you sign up to IPIP which is of course free, you'll automatically hear of the next event we put on in DC.

    Cheers Nigel
    Federal Marketing Manager
    Intel

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